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The bare dual detector v4.3 main board. |
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Surface mount adhesive heat curable is applied for holding ICs in place during soldering operation. |
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Chips are gently placed. |
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Board ready "to cook". |
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Board goes to the oven to cure the adhesive |
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The computer controlled oven is progammed for cure operation. |
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After bake the board is cleaned.
Board is cleaning several times along the assembly.
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Solder paste is applied. |
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Remaining oven solderable SMD components are placed on board. |
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The board goes back to the oven. It is progammed for reflow soldering. |
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Next, components on top side, connectors, transformers and master oscillator are soldered at hand. |
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Finished bottom side |
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Screen walls among detectors and DDS sections.
DDS ICs and Valpey Fisher master oscillator cover with two layer heatsink.
Current version uses Connor- Winfield master oscillator) |
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Finished top side. Board are ready to first test. |
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Multiple tests are conducted along the wiring stage.
Once the VNA is totally assembled and boxed, it is burned for 24 hours.
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